Compact Analog Chaotic Map Designs Using SOI Four-Gate Transistors

Compact Model for Multiple-Gate SOI MOSFETs

In this work we present compact modelling schemes, for the undoped nanoscale multiple-gate MOSFET, suitable for design and projection of these devices. The proposed models have a physical basis and assume well-tempered multiple-gate MOSFETs; i.e., transistors with small shortchannel effects. We have considered different transport models (drift-diffusion and quasi-ballistic models); each one is ...

Design of Low-Voltage Analog Amplifiers Using Floating-Gate Transistors

Analog Signal Processing Circuits Using Floating Gate MOS Transistors

Low voltage non-linear computational circuits useful for analog VLSI signal processing applications based on floating gate MOS transistors (FGMOSFETs) are presented. The FGMOS transistors operate in the saturation region. The variable equivalent threshold voltage (VT) of the FGMOS transistor is exploited in such a way to transform it to a simple MOSFET of zero VT. A bias circuit using a convent...

Analytical modeling of surface accumulation behavior of fully depleted SOI four gate transistors (G(4)-FETs)

A charge sheet model is proposed to analyze the transistor characteristics of fully depleted SOI four gate field effect transistors (G-FETs). The model is derived assuming a parabolic potential variation between the junction-gates and by solving 2-D Poisson’s equation. The proposed model facilitates the calculation of surface potential and charge densities as a function of all gate biases. Modi...

Low-Power Four-Quadrant Multiplier Using Dual-Gate Transistors

Abstract A four-quadrant analog multiplier using a novel type of GaAs transistor is presented. This device, called 2-D MESFET, is dedicated to low power and high speed applications[1],[2]. A special architecture for the multiplier was designed by taking advantage of the dual-gate structure of the 2-D MESFET. The circuit relies on the square algebraic identity [8], with the squaring operation re...